The present invention relates to a semiconductor device, and, for example, to a semiconductor device including a polysilicon resistor.
An on-chip oscillator to be mounted in a semiconductor device is required to secure desired oscillation frequency accuracy under a preset operating condition (power supply voltage, operating temperature). A variation in a resistive element can be considered to be one of the factors by which the oscillation frequency of the on-chip oscillator is varied. The electrical property of a circuit element mounted in a semiconductor device, such as a resistor, is influenced by an error in the condition of manufacturing the semiconductor device, and accordingly the oscillation frequency also varies for every wafer and chip. In order to secure required oscillation frequency accuracy, trimming, by which a resistance value of every chip is adjusted, is generally performed for a semiconductor device in a wafer state.
On the other hand, it is known that a value of a diffused resistor mounted in a semiconductor device varies after a mold package process for resin-sealing a chip. Japanese Unexamined Patent Publication No. 1998-189875 (Patent Document 1) discloses that, in order to suppress a variation in a resistance value of a diffused resistor formed by introducing impurities into a silicon substrate, the variation being caused by a piezo-resistance effect, the diffused resistor is arranged, from the periphery toward the center of a chip main body, in an area within one-third of the distance between the periphery and the center thereof. Japanese Unexamined Patent Publication No. 1994-97368 (Patent Document 2) disclosed that, in order to prevent a variation in the property of an element, the variation being caused by a stress generated when a semiconductor chip is mold-sealed, a group of resistors and a group of transistors are arranged in the circumferential direction from the peripheral portion toward the center.